master's thesis
Parallelization of sorting algorithms

Krešimir Šuljug (2017)
Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Software Engineering
Chair of Programming Languages and Systems
Cite this document

Šuljug, K. (2017). Paralelne izvedbe algoritama za sortiranje (Master's thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:717944

Šuljug, Krešimir. "Paralelne izvedbe algoritama za sortiranje." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2017. https://urn.nsk.hr/urn:nbn:hr:200:717944

Šuljug, Krešimir. "Paralelne izvedbe algoritama za sortiranje." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2017. https://urn.nsk.hr/urn:nbn:hr:200:717944

Šuljug, K. (2017). 'Paralelne izvedbe algoritama za sortiranje', Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 19 November 2019, https://urn.nsk.hr/urn:nbn:hr:200:717944

Šuljug K. Paralelne izvedbe algoritama za sortiranje [Master's thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2017 [cited 2019 November 19] Available at: https://urn.nsk.hr/urn:nbn:hr:200:717944

K. Šuljug, "Paralelne izvedbe algoritama za sortiranje", Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2017. Available at: https://urn.nsk.hr/urn:nbn:hr:200:717944