IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA

Lupić, Sanja

prikaz prve stranice dokumenta IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA

Download
PDF 1.12 MB

undergraduate thesis

IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA

2021. urn:nbn:hr:200:803535

Lupić, Sanja

Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Communications
Chair of Electronics and Microelectronics

Cite this document

APA 6th Edition

Lupić, S. (2021). IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA (Undergraduate thesis). Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek. Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:803535

MLA 8th Edition

Lupić, Sanja. "IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA." Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2021. https://urn.nsk.hr/urn:nbn:hr:200:803535

Chicago 17th Edition

Harvard

Lupić, S. (2021). 'IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA', Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 28 December 2024, https://urn.nsk.hr/urn:nbn:hr:200:803535

Vancouver

Lupić S. IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA [Undergraduate thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2021 [cited 2024 December 28] Available at: https://urn.nsk.hr/urn:nbn:hr:200:803535

IEEE

S. Lupić, "IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA", Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2021. Available at: https://urn.nsk.hr/urn:nbn:hr:200:803535

Cite this item: https://urn.nsk.hr/urn:nbn:hr:200:803535

Please login to the repository to save this object to your list.

Metadata

Title	IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA
Title (english)	MAKING LOGICAL ASSEMBLIES BASED ON MEMISTERS
Author	Sanja Lupić
Mentor	Tomislav Matić (mentor)
Granter	Josip Juraj Strossmayer University of Osijek Faculty of Electrical Engineering, Computer Science and Information Technology Osijek (Department of Communications) (Chair of Electronics and Microelectronics) Osijek
Defense date and country	2021-09-28, Croatia
Scientific / art field, discipline and subdiscipline	TECHNICAL SCIENCES Electrical Engineering Electronics
Abstract	U ovom završnom radu opisana su svojstva memristora te je prikazano na koji način se izrađuju osnovni logički sklopovi temeljeni na memristorima. Opisana je implementacija pojedinog logičkog sklopa te su prikazani rezultati simulacije ulaznih i izlaznih signala. Simulacija je rađena u programu LTspice. Prilikom izrade logičkih sklopova korišten je jinxiang model memristora.
Abstract (english)	This final paper describes the properties of memristors and shows in which way basic logic circuits can be implemented using memristors. Implementation of each logic circuit is described and simulation results of input and output signals are visually presented. Simulation is made in a program named LTspice, whilst logic circuits are made using a Jinxiang memristor model.
Keywords
Keywords (english)
Language	croatian
URN:NBN	urn:nbn:hr:200:803535
Study programme	Title: Undergraduate University Study Programme Study programme type: university Study level: undergraduate Academic / professional title: sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike (sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike)
Type of resource	Text
File origin	Born digital
Access conditions	Open access
Terms of use
Created on	2021-11-05 15:03:06