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undergraduate thesis
IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA
2021. urn:nbn:hr:200:803535
Lupić, Sanja
Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Communications
Chair of Electronics and Microelectronics

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Lupić, S. (2021). IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA (Undergraduate thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:803535

Lupić, Sanja. "IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA." Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2021. https://urn.nsk.hr/urn:nbn:hr:200:803535

Lupić, Sanja. "IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA." Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2021. https://urn.nsk.hr/urn:nbn:hr:200:803535

Lupić, S. (2021). 'IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA', Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 29 January 2023, https://urn.nsk.hr/urn:nbn:hr:200:803535

Lupić S. IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA [Undergraduate thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2021 [cited 2023 January 29] Available at: https://urn.nsk.hr/urn:nbn:hr:200:803535

S. Lupić, "IZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA", Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2021. Available at: https://urn.nsk.hr/urn:nbn:hr:200:803535

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Metadata
TitleIZRADA LOGIČKIH SKLOPOVA TEMELJENIH NA MEMRISTORIMA
Title (english)MAKING LOGICAL ASSEMBLIES BASED ON MEMISTERS
AuthorSanja Lupić
MentorTomislav Matić (mentor)
GranterJosip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
(Department of Communications)
(Chair of Electronics and Microelectronics)
Osijek
Defense date and country2021-09-28, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Electrical Engineering
Electronics
Abstract
U ovom završnom radu opisana su svojstva memristora te je prikazano na koji način se izrađuju osnovni logički sklopovi temeljeni na memristorima. Opisana je implementacija pojedinog logičkog sklopa te su prikazani rezultati simulacije ulaznih i izlaznih signala. Simulacija je rađena u programu LTspice. Prilikom izrade logičkih sklopova korišten je jinxiang model memristora.
Abstract (english)
This final paper describes the properties of memristors and shows in which way basic logic circuits can be implemented using memristors. Implementation of each logic circuit is described and simulation results of input and output signals are visually presented. Simulation is made in a program named LTspice, whilst logic circuits are made using a Jinxiang memristor model.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:200:803535
Study programmeTitle: Undergraduate University Study Programme
Study programme type: university
Study level: undergraduate
Academic / professional title: sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike (sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike)
Type of resourceText
File originBorn digital
Access conditionsOpen access
Terms of useLicence In copyright icon
Created on2021-11-05 15:03:06