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master's thesis
Razvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA
2024. urn:nbn:hr:200:732086
Miličević, Davorin
Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Computer Engineering and Automation
Chair of Computer Engineering

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Miličević, D. (2024). Razvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA (Master's thesis). Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek. Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:732086

Miličević, Davorin. "Razvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2024. https://urn.nsk.hr/urn:nbn:hr:200:732086

Miličević, Davorin. "Razvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2024. https://urn.nsk.hr/urn:nbn:hr:200:732086

Miličević, D. (2024). 'Razvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA', Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 26 November 2024, https://urn.nsk.hr/urn:nbn:hr:200:732086

Miličević D. Razvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA [Master's thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2024 [cited 2024 November 26] Available at: https://urn.nsk.hr/urn:nbn:hr:200:732086

D. Miličević, "Razvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA", Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2024. Available at: https://urn.nsk.hr/urn:nbn:hr:200:732086

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Metadata
TitleRazvoj, optimizacija i implementacija dubokih neuronskih mreža na FPGA
Title (english)Development, optimization and implementation of deep neural networks on FPGA
AuthorDavorin Miličević
MentorIvan Vidović (mentor)
Committee memberIvan Vidović (predsjednik povjerenstva)
Committee memberTomislav Matić (član povjerenstva)
Committee memberIvan Aleksi (član povjerenstva)
GranterJosip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
(Department of Computer Engineering and Automation)
(Chair of Computer Engineering)
Osijek
Defense date and country2024-09-16, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Process Computing
Abstract
Diplomski rad se bavi istraživanjem razvoja, optimizacije i implementacije dubokih neuronskih mreža na FPGA platformama. Glavni problem koji se istražuje je kako učinkovito kvantizirati i prilagoditi duboke neuronske mreže za obradu na ograničenim hardverskim resursima. Koristeći alate poput Brevitas, FINN, Vivado i Vitis HLS, provedena je kvantizacija i prilagodba konvolucijskih neuronskih mreža (LeNet-5 i Yolov3). Implementacija na Xilinx PYNQ-Z2 platformi pokazala je da ove metode omogućuju uspješnu optimizaciju za zadatke detekcije i klasifikacije objekata. Dinamička rekonfiguracija sustava omogućila je prilagodbu specifičnim operativnim uvjetima, značajno poboljšavajući energetsku efikasnost i fleksibilnost sustava.
Abstract (english)
This thesis investigates the development, optimization, and implementation of deep neural networks on FPGA platforms. The main problem addressed is how to effectively quantize and adapt deep neural networks for processing on limited hardware resources. Utilizing tools such as Brevitas, FINN, Vivado, and Vitis HLS, quantization and adaptation of convolutional neural networks (LeNet-5 and Yolov3) were performed. Implementation on the Xilinx PYNQ-Z2 platform demonstrated that these methods enable successful optimization for object detection and classification tasks. Dynamic system reconfiguration allowed adaptation to specific operational conditions, significantly improving the system's energy efficiency and flexibility.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:200:732086
Study programmeTitle: University Study Automobile Computer and Communication
Study programme type: university
Study level: graduate
Academic / professional title: sveučilišni/a magistar/magistra inženjer/inženjerka automobilskog računarstva i komunikacija (sveučilišni/a magistar/magistra inženjer/inženjerka automobilskog računarstva i komunikacija)
Type of resourceText
File originBorn digital
Access conditionsOpen access
Terms of useLicence In copyright icon
Created on2024-09-18 09:46:37