master's thesis
Programming model of arithmetic-logic unit in a microprocessor

Goran Toth (2015)
Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Computer Engineering and Automation
Chair of Computer Engineering
Cite this document...

Toth, G. (2015). Programski model aritmetičko-logičke jedinice mikroprocesora (Master's thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth, Goran. "Programski model aritmetičko-logičke jedinice mikroprocesora." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2015. https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth, Goran. "Programski model aritmetičko-logičke jedinice mikroprocesora." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2015. https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth, G. (2015). 'Programski model aritmetičko-logičke jedinice mikroprocesora', Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 22 March 2019, https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth G. Programski model aritmetičko-logičke jedinice mikroprocesora [Master's thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2015 [cited 2019 March 22] Available at: https://urn.nsk.hr/urn:nbn:hr:200:581127

G. Toth, "Programski model aritmetičko-logičke jedinice mikroprocesora", Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2015. Available at: https://urn.nsk.hr/urn:nbn:hr:200:581127