master's thesis
Programski model aritmetičko-logičke jedinice mikroprocesora

Toth, Goran
Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Computer Engineering and Automation
Chair of Computer Engineering

Cite this document

Toth, G. (2015). Programski model aritmetičko-logičke jedinice mikroprocesora (Master's thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth, Goran. "Programski model aritmetičko-logičke jedinice mikroprocesora." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2015. https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth, Goran. "Programski model aritmetičko-logičke jedinice mikroprocesora." Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2015. https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth, G. (2015). 'Programski model aritmetičko-logičke jedinice mikroprocesora', Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 12 August 2022, https://urn.nsk.hr/urn:nbn:hr:200:581127

Toth G. Programski model aritmetičko-logičke jedinice mikroprocesora [Master's thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2015 [cited 2022 August 12] Available at: https://urn.nsk.hr/urn:nbn:hr:200:581127

G. Toth, "Programski model aritmetičko-logičke jedinice mikroprocesora", Master's thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2015. Available at: https://urn.nsk.hr/urn:nbn:hr:200:581127

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